Projeto, implementação e desempenho dos algoritmos criptográficos AES, PRESENT e CLEFIA em FPGA

Abstract

The development of dedicated cryptography systems for applications requiring low cost and consumption has been the current focus of research. This work addresses the design and performance analysis of cryptographic algorithms AES-128 (NIST standard), PRESENT-80 and CLEFIA-128 (ISO/IEC standard for Lightweight Cryptography), im-plemented in FPGA (Basys 3 Artix-7 - 28 nm technology) using VHDL. Performance metrics were analyzed and compared: occupied area in the FPGA, throughput (Mbps), efficiency (Mbps/slice), energy efficiency (Ws/bit) and current consumption. The metrics were obtained through the synthesis and implementation tool in FPGA, Vivado Design Suites (Xilinx), and by means of a current measurement prototype, which uses the Ada-fruit INA219 sensor board (Sensor from Texas Instruments) and microcontroller Arduino Uno (Atmega328 - Atmel). We also analyzed the graphical representation of current con-sumption through the mathematical model based on the Welch periodogram, applied on the current consumption variables during the data encryption process. The results show current curves that facilitate the identification and comparison of the algorithms. The data of area consumption, processing speed and efficiency in the FPGA obtained satisfactory performance in comparison with other implementations existing in the literature, besides providing relevant information to choose an algorithm of encryption.